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wiki:g2_zero_client [2015/12/09 23:02] cyrozap [G2 Zero Client] Added device image |
wiki:g2_zero_client [2017/03/18 14:03] (current) cyrozap [Parts List] The Rev. B unit's FPGA is actually speed grade 2 |
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====== G2 Zero Client ====== | ====== G2 Zero Client ====== | ||
- | {{:wiki:pano_logic_g2_front.jpg?700|}} | + | {{:wiki:pano_logic_g2_front.jpg?600|}} |
+ | |||
+ | ===== Code ===== | ||
[[https://github.com/cyrozap/Pano-Logic-Zero-Client-G2-FPGA-Demo|GitHub repo with demo code]] | [[https://github.com/cyrozap/Pano-Logic-Zero-Client-G2-FPGA-Demo|GitHub repo with demo code]] | ||
- | ===== Parts List (Rev. C) ===== | + | ===== Parts List ===== |
^ Device ^ Quantity ^ Description ^ URLs ^ | ^ Device ^ Quantity ^ Description ^ URLs ^ | ||
- | | Xilinx XC6SLX100-FGG484-3 | 1 | FPGA | [[http://www.xilinx.com/products/silicon-devices/fpga/spartan-6/lx.html|Product Page]] [[http://www.xilinx.com/support/index.html/content/xilinx/en/supportNav/silicon_devices/fpga/spartan-6.html|Technical Documentation]] | | + | | Xilinx XC6SLX150-FGG484-2/XC6SLX100-FGG484-3 | 1 | FPGA | [[http://www.xilinx.com/products/silicon-devices/fpga/spartan-6.html|Product Page]] | |
- | | Micron MT47H32M16HR-25E:G (D9LPX) | 2 | 512Mb DDR2 SDRAM | [[http://www.micron.com/parts/dram/ddr2-sdram/mt47h32m16hr-25e|Product Page]] [[https://www.micron.com/~/media/Documents/Products/Data%20Sheet/DRAM/DDR2/512MbDDR2.pdf|Datasheet]] | | + | | Micron MT47H32M16HR-25E:G (D9LPX) | 2 | 512Mb DDR2 SDRAM | [[https://web.archive.org/web/20151113095941/http://www.micron.com/parts/dram/ddr2-sdram/mt47h32m16hr-25e|Product Page]] [[https://www.micron.com/~/media/Documents/Products/Data%20Sheet/DRAM/DDR2/512MbDDR2.pdf|Datasheet]] | |
+ | | Micron M25P128-VME6 (25P28V6G) | 1 | 128Mb SPI NOR Flash | [[https://www.micron.com/parts/nor-flash/serial-nor-flash/m25p128-vme6gb|Product Page]] [[https://www.micron.com/~/media/documents/products/data-sheet/nor-flash/serial-nor/m25p/m25p_128.pdf|Datasheet]] | | ||
| Chrontel CH7301C | 2 | DVI Transmitter | [[http://www.chrontel.com/index.php/ch7301c-dvi-transmitter|Product Page]] [[http://www.chrontel.com/media/Datasheets/CH7301C%20Datasheet%20rev2.1.pdf|Datasheet]] | | | Chrontel CH7301C | 2 | DVI Transmitter | [[http://www.chrontel.com/index.php/ch7301c-dvi-transmitter|Product Page]] [[http://www.chrontel.com/media/Datasheets/CH7301C%20Datasheet%20rev2.1.pdf|Datasheet]] | | ||
- | | SMSC USB3300 | 1 | USB Transceiver | [[https://www.microchip.com/wwwproducts/Devices.aspx?product=USB3300|Product Page]] [[http://ww1.microchip.com/downloads/en/DeviceDoc/00001783B.pdf|Datasheet]] | | + | | SMSC USB3300 | 1 | USB Transceiver | [[https://www.microchip.com/wwwproducts/en/USB3300|Product Page]] [[http://ww1.microchip.com/downloads/en/DeviceDoc/00001783C.pdf|Datasheet]] | |
| SMSC USB2514 | 1 | USB Hub | [[https://media.digikey.com/pdf/Data%20Sheets/Microchip%20PDFs/USB2512,12A,12B;2513,13B;2514,14B;2517.pdf|Datasheet]] | | | SMSC USB2514 | 1 | USB Hub | [[https://media.digikey.com/pdf/Data%20Sheets/Microchip%20PDFs/USB2512,12A,12B;2513,13B;2514,14B;2517.pdf|Datasheet]] | | ||
- | | Wolfson WM8750BG | 1 | Audio DAC | [[http://www.cirrus.com/en/products/wm8750.html|Product Page]] [[http://www.cirrus.com/en/pubs/proDatasheet/WM8750BL_v4.1.pdf|Datasheet]] | | + | | Wolfson WM8750BG | 1 | Audio DAC | [[https://www.cirrus.com/products/wm8750/|Product Page]] [[https://d3uzseaevmutz1.cloudfront.net/pubs/proDatasheet/WM8750BL_v4.1.pdf|Datasheet]] | |
| Marvel 88E1119R-NNW2 | 1 | Gigabit Ethernet PHY | | | | Marvel 88E1119R-NNW2 | 1 | Gigabit Ethernet PHY | | | ||
+ | |||
+ | === Differences Between Device Revisions === | ||
+ | |||
+ | Three revisions of the G2 Zero Client were produced: A, B, and C. I haven't been able to acquire a revision A device, so I can only assume it uses an XC6SLX150 like revision B. Revision C uses an XC6SLX100, presumably to reduce costs. | ||
===== Programming ===== | ===== Programming ===== | ||
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VTref is a 2.5V target reference voltage output. You should connect it to the target reference voltage input on your JTAG probe so it uses the right logic levels when communicating with the device. For a SEGGER J-Link, connect this pin to [[https://www.segger.com/interface-description.html|pin 1 on the J-Link]]. | VTref is a 2.5V target reference voltage output. You should connect it to the target reference voltage input on your JTAG probe so it uses the right logic levels when communicating with the device. For a SEGGER J-Link, connect this pin to [[https://www.segger.com/interface-description.html|pin 1 on the J-Link]]. | ||
+ | |||
==== SPI Flash (via the Pano Logic BurnIn tool) ==== | ==== SPI Flash (via the Pano Logic BurnIn tool) ==== | ||
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[[https://docs.google.com/file/d/0B9fxMMbyahDFS3h6QnJWak9xTEE/edit|The VM image]] (sha256sum: d741aa2fc6d68a5cbd7e8f698be9010c9669c2569cf012db717035e970655d9d) | [[https://docs.google.com/file/d/0B9fxMMbyahDFS3h6QnJWak9xTEE/edit|The VM image]] (sha256sum: d741aa2fc6d68a5cbd7e8f698be9010c9669c2569cf012db717035e970655d9d) | ||
+ | ===== More Information ===== | ||
+ | |||
+ | ==== YouTube ==== | ||
+ | [[https://www.youtube.com/user/PanoLogicHelp|PanoLogicHelp]] | ||
+ | [[https://www.youtube.com/user/zeroPano|zeroPano]] |