Table of Contents
G2 Zero Client
Code
Parts List
Device | Quantity | Description | URLs |
---|---|---|---|
Xilinx XC6SLX150-FGG484-2/XC6SLX100-FGG484-3 | 1 | FPGA | Product Page |
Micron MT47H32M16HR-25E:G (D9LPX) | 2 | 512Mb DDR2 SDRAM | Product Page Datasheet |
Micron M25P128-VME6 (25P28V6G) | 1 | 128Mb SPI NOR Flash | Product Page Datasheet |
Chrontel CH7301C | 2 | DVI Transmitter | Product Page Datasheet |
SMSC USB3300 | 1 | USB Transceiver | Product Page Datasheet |
SMSC USB2514 | 1 | USB Hub | Datasheet |
Wolfson WM8750BG | 1 | Audio DAC | Product Page Datasheet |
Marvel 88E1119R-NNW2 | 1 | Gigabit Ethernet PHY |
Differences Between Device Revisions
Three revisions of the G2 Zero Client were produced: A, B, and C. I haven't been able to acquire a revision A device, so I can only assume it uses an XC6SLX150 like revision B. Revision C uses an XC6SLX100, presumably to reduce costs.
Programming
JTAG
The pinout is as follows:
1 | 2 | 3 | 4 | 5 | 6 |
---|---|---|---|---|---|
VTref | TDI | TMS | TDO | TCK | GND |
Pin 1 can be identified easily since it has a dot right next to it.
VTref is a 2.5V target reference voltage output. You should connect it to the target reference voltage input on your JTAG probe so it uses the right logic levels when communicating with the device. For a SEGGER J-Link, connect this pin to pin 1 on the J-Link.
SPI Flash (via the Pano Logic BurnIn tool)
The VM image (sha256sum: d741aa2fc6d68a5cbd7e8f698be9010c9669c2569cf012db717035e970655d9d)